The spread spectrum communication (hereinafter referred to as SS communication) system is a digital transmission system and is characterized particularly in that information to be transmitted is spread into a wider frequency band than that required for transmission.
For a SS communication, data is spread in the sending side with a pseudo noise signal (hereinafter referred to as PN code) of the code series specified previously between the sending and receiving sides and such data is then reversely spread using the PN code series of the same code series in the receiving side. Therefore, if codes in the sending and receiving sides are not synchronized accurately, data cannot be transmitted and received.
Accordingly, a receiver utilizing a DLL (Delay Lock Loop) circuit has been proposed. The receiver utilizing the DLL circuit comprises a receiving circuit to receive the spread spectrum signal transmitted from a transmitter, a first correlation circuit which reversely spreads the received spread spectrum signal with the PN code train of the reference phase, a second correlation circuit which reversely spreads the received spread spectrum signal with the PN code train which is delayed by 1/2 bit from the reference phase, a third correlation circuit which reversely spreads the receiver spread spectrum signal which leads by 1/2 bit from the reference phase of the PN code train, a hybrid circuit which differentially combines outputs of the second correlation circuit and the third correlation circuit and a demodulation circuit which is connected to said correlation circuit and extracts data elements from the received spread spectrum signal. That is, the receiver first reversely spreads, in an initial seizing operation, received spread spectrum signals by generating a PN code train with a bit rate quicker than that in the sending side. When the first correlation circuit detects the peak of correlation between the spread spectrum signal which has been reversely spread and the PN code train of the reference phase, the receiver establishes a temporary synchronization by generating a PN code train with a bit rate equal to that in the sending side and finally establishes the phase lock condition by adjusting the bit rate so that an output of a hybrid circuit becomes 0 through the synchronization sustaining control.
Since a large amount of energy can be extracted from an SS communication only when correlation exists between the PN code trains of the sending and receiving sides, this communication system is widely employed, for example, for satellite communication which is resistive to noise and establishes communication, for example, using a weak signal.
For instance, when a receiver is installed into a mobile vehicle, a receiving antenna is often shielded temporarily by buildings or tunnels. Therefore, the receiver often generates asynchronization easily when it is installed in a moving object for mobile communication.
In addition, if the PN codes are asynchronized for some reason after establishing the phase lock, the conventional receiver reestablishes the phase lock again by re-executing the initial seizing control operation.
The PN code train used in SS communication is required to have sufficient resistivity to noise. Therefore, the PN code is also required to have a certain bit length which is necessary for a circulation of PN codes.
In the initial seizing control operation, correlation is detected, for example, by shifting one bit for each circulation of a PN code train. Therefore, when the bit length of a PN code is long, the receiver requires a comparatively longer period for reestablishing the phase lock. As described above, it is impossible to send or receive data for the SS communication if the codes are not accurately synchronized between the sending and receiving sides. Accordingly, the conventional receiver has a disadvantage in that communication is suspended for a considerable period if asynchronization occurs.
Moreover, when communication with a moving satellite is necessary, the frequency of received signal is deviated from the sending frequency due to a Doppler shift. The amount of such Doppler shift always changes.
As a means for tracking the frequency which always changes, an AFC (Auto Frequency Control) circuit has been proposed. However, in SS communication, it is often difficult to track the frequency by using the AFC circuit, because the carrier is not contained in the signal in many cases in SS communication. Therefore, the conventional receiver executes the frequency tracking in conjunction with the first correlation circuit and demodulation circuit. As a result, the conventional receiver also provides a disadvantage in that the receiving circuit is very complicated.
Moreover, SS communication systems often use the BPSK (Biphase Phase Shift Keying) signal. Accordingly, in many cases, the Costas Loop circuit is used as the demodulating circuit.
With reference to FIG. 2e, the conventional Costas Loop demodulating circuit is briefly described hereunder.
The Costas Loop demodulating circuit is composed of three multipliers. The first multiplier multiplies a VCO output and the reversely spread signal, while the second multiplier multiplies the signal obtained by shifting the phase of VCO output by 90.degree. and the reversely spread signal and the third multiplier multiplies outputs of the first and second multipliers. An output of the third multiplier controls VCO so that the phase difference between the VCO output and the reversely spread signal can be suppressed to zero. Namely, VCO of Costas Loop demodulating circuit tracks the virtual carrier and therefore the demodulated data can be obtained at the first multiplier output. However, since this output does not contain the amplitude information, it is impossible to judge whether VCO accurately tracks the virtual carrier (i.e. the Costas Loop demodulating circuit locks) or not.
In order to judge whether the Costas Loop demodulating circuit locks or not, the conventional receiver multiplies the signals obtained by shifting VCO output by +45.degree. and the reversely spread signal using the 4th and 5th multipliers and also multiplies the outputs of 4th and 5th multipliers using the 6th multiplier.
Accordingly, the conventional receiver further requires three multipliers and phase shifters for shifting the phases .+-.45.degree. in order to judge the lock of the Costas Loop demodulating circuit, resulting in a problem that the circuit structure is very complicated. In addition, a problem arises in that an increase of frequency used for SS communication complicates the design of the phase shifter.